Abstract:
:A hippocampal prosthesis is a very large scale integration (VLSI) biochip that needs to be implanted in the biological brain to solve a cognitive dysfunction. In this letter, we propose a novel low-complexity, small-area, and low-power programmable hippocampal neural network application-specific integrated circuit (ASIC) for a hippocampal prosthesis. It is based on the nonlinear dynamical model of the hippocampus: namely multi-input, multi-output (MIMO)-generalized Laguerre-Volterra model (GLVM). It can realize the real-time prediction of hippocampal neural activity. New hardware architecture, a storage space configuration scheme, low-power convolution, and gaussian random number generator modules are proposed. The ASIC is fabricated in 40 nm technology with a core area of 0.122 mm[Formula: see text] and test power of 84.4 [Formula: see text]W. Compared with the design based on the traditional architecture, experimental results show that the core area of the chip is reduced by 84.94% and the core power is reduced by 24.30%.
journal_name
Neural Computjournal_title
Neural computationauthors
Qiao Z,Han Y,Han X,Xu H,Li WXY,Song D,Berger TW,Cheung RCCdoi
10.1162/neco_a_01107subject
Has Abstractpub_date
2018-09-01 00:00:00pages
2472-2499issue
9eissn
0899-7667issn
1530-888Xjournal_volume
30pub_type
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